FPGA Implementations
Posted: Sun Jun 18, 2017 2:09 pm
New here, but my first computer was a C1P back in 1980. I later traded it for a C4P MF and ended up working for the local dealer in Tulsa for several years in college (and doing freelance work afterwards). Searching for a C1P and a C3, but that's a different story...
I started with my first FPGA project a few weeks ago using Grant Searle's Multicomp (6502, 6809, or Z80) design. After getting that working I moved on to the UK 101 which was designed for PAL video but that I was able to get working on NTSC without too much trouble.
After that, I spent more time tweaking the video code and the ROM and now have a UK 101 that has 24 characters by 25 line video on NTSC.
Up next is swapping out the UK 101 ROMs with OSI ROMs in the project and hopefully having a fully functional C1P in a $20 FPGA.
I've attached a photo my breadboarded (literally) system. Clockwise from the lower left corner is the FPGA board, 128K of memory, the composite vido out & PS/2 keyboard in jacks, and and RS-232 serial port level converter.
Have run into some interesting and unexpected things that actually have potential. Working on the video, I could not figure out how some stuff was eventually scrolling into view instead of hitting the bit bucket because I only had 1K of video RAM allocated in the FPGA. It turned out that the RAM chip "fills in" any unused portions of the address space. So I was writing some stuff to system RAM and it was scrolling into the video memory as I worked on patching scrolling for the 24x25 video format.
I have taken Grant's OSI BASIC code and have that working with all the bug patches and scrubbed of a few things (like typing A at the reset prompt to get the author's name) to free up some space and change a some other things.
So far I have about $50 invested and half of that is for the JTAG USBblaster used to program the FPGA board. All of the parts were either from Amazon or the junk box. I can clock it at 16.67 MHz in the serial mode and it works flawlessly. (I haven't set up the fast clock in the UK101 code yet.)
The only variance from Grant's instructions have been a small capacitor on the memory board and the use of a pre-built RS-232 level converter (3.3 volts in and RS-232 out). The only problem I've had was that I reversed the data and clock lines on the PS/2 keyboard jack and that was totally me not bothering to check the pinout and making an guess based on how other connectors I've used were pinned.
I was curious if others are tinkering much with FPGAs. I see that some of Grant's work was ported to the MiST board. I'm probably going to move to a more powerful board at some point and the MiST is one I'm considering. Seems like if they have Grant's basic machine running it should be reasonable to get the UK101 running. And if you can do that, evolving it to a C1P or a C2-4P isn't unreasonable.
Thanks,
Jim W4JBM
I started with my first FPGA project a few weeks ago using Grant Searle's Multicomp (6502, 6809, or Z80) design. After getting that working I moved on to the UK 101 which was designed for PAL video but that I was able to get working on NTSC without too much trouble.
After that, I spent more time tweaking the video code and the ROM and now have a UK 101 that has 24 characters by 25 line video on NTSC.
Up next is swapping out the UK 101 ROMs with OSI ROMs in the project and hopefully having a fully functional C1P in a $20 FPGA.
I've attached a photo my breadboarded (literally) system. Clockwise from the lower left corner is the FPGA board, 128K of memory, the composite vido out & PS/2 keyboard in jacks, and and RS-232 serial port level converter.
Have run into some interesting and unexpected things that actually have potential. Working on the video, I could not figure out how some stuff was eventually scrolling into view instead of hitting the bit bucket because I only had 1K of video RAM allocated in the FPGA. It turned out that the RAM chip "fills in" any unused portions of the address space. So I was writing some stuff to system RAM and it was scrolling into the video memory as I worked on patching scrolling for the 24x25 video format.
I have taken Grant's OSI BASIC code and have that working with all the bug patches and scrubbed of a few things (like typing A at the reset prompt to get the author's name) to free up some space and change a some other things.
So far I have about $50 invested and half of that is for the JTAG USBblaster used to program the FPGA board. All of the parts were either from Amazon or the junk box. I can clock it at 16.67 MHz in the serial mode and it works flawlessly. (I haven't set up the fast clock in the UK101 code yet.)
The only variance from Grant's instructions have been a small capacitor on the memory board and the use of a pre-built RS-232 level converter (3.3 volts in and RS-232 out). The only problem I've had was that I reversed the data and clock lines on the PS/2 keyboard jack and that was totally me not bothering to check the pinout and making an guess based on how other connectors I've used were pinned.
I was curious if others are tinkering much with FPGAs. I see that some of Grant's work was ported to the MiST board. I'm probably going to move to a more powerful board at some point and the MiST is one I'm considering. Seems like if they have Grant's basic machine running it should be reasonable to get the UK101 running. And if you can do that, evolving it to a C1P or a C2-4P isn't unreasonable.
Thanks,
Jim W4JBM