Challenger 8P System Build

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Joined: Tue Feb 20, 2018 12:48 am

Challenger 8P System Build

Post by TangentDelta » Sun May 19, 2019 3:30 am


I've been working on building up a system for the past year or so. I've gotten it to a point that I feel comfortable creating a forum post for it.
The boards in the system are:
  • OSI 502 CPU board (GlitchWorks reproduction)
  • GW-OSI-RAM1 memory board
  • Custom 6551 mezzanine for the GW-OSI-RAM1
  • OSI 560Z Processor lab (GlitchWorks reproduction)
  • 4-slot backplane (GlitchWorks reproduction)
  • GW-OSI-RAM1 memory board
  • OSI 580 backplane
Here is an album of the system:

The first board that I acquired and populated was the GW-OSI-RAM1 used on the MOS side. Initially, I used it as a RAM/ROM expansion for my AIM-65. To add a more reliable serial port to the AIM-65, I expanded the I/O mezzanine connector and created a 6551 mezzanine board to plug into it. The MOS GW-OSI-RAM1 is populated with 64K RAM and 32K ROM. I have a custom version of WOZMon in ROM that includes an Intel hex loader.

The second board to be built up was the 502 CPU board. Since I had a RAM/ROM board already, I omitted the RAM and ROM portions of the 502. Additionally, I replaced the multivibrator R/C clock with an adjustable clock module and added a reset/brownout circuit utilizing a DS1233. Initially I tried running the system using the 6850 ACIA but I was unable to due to the conflict between the upper 4K memory block and the ACIA at $FC00. To remedy this I removed the 6850 ACIA and installed my 6551 mezzanine. I would like to use the 6850 for full OSI compatibility but I don't have an easy way to do this at the moment.

The 560Z is pretty standard. The only modifications made to it include an LED on the 6551's RUN line for debugging and jumpers on the address select lines that move it to $A000.

The SYS GW-OSI-RAM1 is populated with 32K words of RAM.

I transposed the 560Z driver package into CC65 assembly and modified it to work with my personal setup. I also made a few improvements and changes. Once I clean it up a bit and get my system running with a 6850 ACIA I'll post the source code on Github.

On the Z80 side, I added a character driver to I/O address 0. IN 0 pulls a character from the keyboard and OUT 0 writes a character to the terminal. The host 6502 system does the actual ACIA status register checking and returns control to the Z80 once it finishes. I ported Glitch's GWMon-80 to the system using this character driver. I'll include my module with the 560Z sources.

The I6100 IOT drivers were left mostly unmodified. I rewrote the READOP and HANREQ routines, as they were extremely difficult to follow and needlessly complex. Once everything was verified, I was able to run FOCAL. I would like to eventually add IOTs for memory bank switching and mass-storage.

Future plans for the system include:
  • Move back to the 6850 ACIA for full OSI compatibility
  • Expand SYS RAM to 128K
  • General-purpose IO card with 4 additional ACIAs and several free 6820 PIAs (in the design process)
  • Mass-storage
  • Run OS65-D
  • Upgrade to a 510 CPU board
  • Drive a PDP-8 replica front-panel for the whole PDP-8 front-panel experience

Posts: 10
Joined: Tue Feb 20, 2018 12:48 am

Re: Challenger 8P System Build

Post by TangentDelta » Sun May 19, 2019 1:09 pm

I spent some time this morning on getting the 6850 up and running on the 502 board.

I ran the chip select line for the 6850 into one of the unused gates of a 74HC04. The output of the gate then jumpers over to the MOS GW-OSI-RAM1's *MM1B memory management input. This disables the entire $FC00 block of memory on the memory board whenever the 6850 is addressed, resolving the address conflict issue.

I modified my custom version of WOZMon to use the 6850, and everything works great!

I'm going to keep the 6551 in the system and use it as a dedicated serial port for the 560Z driver packages.

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Joined: Mon Nov 28, 2011 12:43 am

Re: Challenger 8P System Build

Post by glitch » Mon May 20, 2019 5:47 pm

Excellent work -- nice to see this system up and running again! For anyone who went to VCF East, this is the smaller of the two OSI systems that was in the hackerspace where we were doing kit building stuff.

I look forward to the release of your 560Z driver package. I've just got the load-format version that I think most people here are using, it'd be awesome to have an improved version with source available!
Check out The Glitch Works
OSI Challenger 3, 510 CPU, 8" floppies, 74 MB hard disk system in need of restore
Parts bin Challenger 3 board set, never had a chassis in its time

Posts: 10
Joined: Tue Feb 20, 2018 12:48 am

Re: Challenger 8P System Build

Post by TangentDelta » Sat Jun 01, 2019 2:08 am

I have added an OSI 550 serial board populated with 4 ACIAs to the system.


The board is configured to occupy memory page #$FC00, which makes it compatible with the 502/510 CPU board's built-in ACIA. Having potentially 16 ACIAs in a single page feels slightly less wasteful than a single ACIA taking up a full page.

The purple wire is going off to the MOS GW-OSI-RAM1 in order to inhibit the page of memory occupied by the 550.

I have removed the 502's ACIA and the 6551 mezzanine on the MOS GW-OSI-RAM1. They were redundant and are no longer necessary.

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