Great, thanks.
Yes, I'd noticed it took a long time to work when I was testing with the oscilloscope earlier. Got to hit the sack now, midnight here in the UK, will test some more tomorrow.
Appreciate the pointers, thanks.
Great, thanks.
I tried this and didn't see any activity, so not sure if it's running or not...bxdanny wrote: ↑Thu Jan 25, 2024 9:51 pm You can check if the CPU is actually executing the ROM code properly by hitting <Break>C<return><return> and then SAVE<return>, looking at the signal on the TxData output of the ACIA as you hit that last return. If things are actually running correctly, you should see almost one full second of activity on that line as the ACIA outputs the message <cr><lf>OK<cr><lf> at 300 bps, with 10 NUL characters inserted after each <cr>.
I was working through the clocks today and I'm currently getting just 500KHz on pin 11 and 250Khz on pin 12 of the LS93. I have tried another IC but it's the same.
BTW I'm using the file from here for the character ROM: https://github.com/jefftranter/6502/tre ... board/roms
Hi, yes that seems to be the issue. The first stage of U79 is being used as a buffer and should have 4MHz on pin 6.It looks like there's no output on pin 6 of U79 either, the LS86, even though pin 5 has 4Mhz.
I have tried swapping U58 and U29, to no avail, and I'm waiting on replacement parts for the LS86, U79.
U24 and 25 are MC8T28P's as specified in the BoM.
Once I get the replacements for U79 I'll go back and check the clocks again, but wondering if the part I have is marginal even though it tests OK.
One question, what should I see at pin 1 of U29, the LS93? Should it be 4Mhz or 8 Mhz, as currently it's getting 4Mhz but the outputs are divided by 8 to deliver 500Khz on pin 11 of U29 and not the 1Mhz as expected.
That is super helpful John, thank you. What I was sort of expecting, but it's nice to have the verificationjbtech wrote: ↑Mon Jan 29, 2024 11:13 pmHi, yes that seems to be the issue. The first stage of U79 is being used as a buffer and should have 4MHz on pin 6.It looks like there's no output on pin 6 of U79 either, the LS86, even though pin 5 has 4Mhz.
I have tried swapping U58 and U29, to no avail, and I'm waiting on replacement parts for the LS86, U79.
U24 and 25 are MC8T28P's as specified in the BoM.
Once I get the replacements for U79 I'll go back and check the clocks again, but wondering if the part I have is marginal even though it tests OK.
One question, what should I see at pin 1 of U29, the LS93? Should it be 4Mhz or 8 Mhz, as currently it's getting 4Mhz but the outputs are divided by 8 to deliver 500Khz on pin 11 of U29 and not the 1Mhz as expected.
The second stage of U79 takes two 4MHz signals which are partially out of phase (biphase) to create a 8MHz signal.
That is then divided by 2, 4 and 8 in the '93 to give the 1MHz clock on pin 11 and further divided by 2 to give 500kHz on pin 12.
With only one input the second stage of U79 will output 4MHz causing everything after that to be halved.
Rough sketch follows - wouldn't hurt to check around U79 for shorted tracks before replacing it. Regards, John.
IMG_1778.JPG
So maybe you should go back to a 74LS00?I swapped out U58 this morning, I had a 7400 in there as per the BoM, but dropped in a 74S00 instead and started to get 8Mhz on pin 8 of U79, however the clock is really unstable, flashing up and down in frequency.
Don't worry, I was happy to try anything at this point. It seems rather strange that you would derive 8Mhz from 4Mhz, just seems like unecessary complications.bxdanny wrote: ↑Tue Jan 30, 2024 12:47 pmSo maybe you should go back to a 74LS00?I swapped out U58 this morning, I had a 7400 in there as per the BoM, but dropped in a 74S00 instead and started to get 8Mhz on pin 8 of U79, however the clock is really unstable, flashing up and down in frequency.
Perhaps I should stay out of this, but I'd hate to think that my earlier comments made you switch away from using a 74LS00 there, and that turned out to be a mistake which is now causing problems.
But I'm certainly confused as to why the circuit would be designed so that it tries to derive an 8 MHz signal from a 4 MHz crystal. Wouldn't it have been easier to just use an 8 MHz crystal and divide it down as needed? Maybe OSI still had a large stock of those 3.932160 MHz crystals, and simply wanted to keep making use of them?