Soft Shiftlock and RESET delay circuit

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dave
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Soft Shiftlock and RESET delay circuit

Post by dave »

I have finally had a chance to work on the OSI interface for the Unified Retrocomputer Keyboard Project. The interface board turns the keyboard matrix into an OSI 542C compatible keyboard, including the sound circuits and RESET delay and RESET on powerup. I also added in a soft-shiftlock function that can be jumper selected if a latching shiftlock key is not available, and a shiftlock LED for both the hard and soft shiftlock options.

I have broken out the /RESET and SHIFTLOCK circuits as a separate small PCB, in case anyone cares to add the functionality to a Superboard, or an older 542 keyboard.

There are other ways to implement these circuits, including the original OSI RESET circuit, or using a flip flop or using 555 timers, but this circuit has some advantages:
  • Both functions are implemented using only 2 chips, and relatively few discrete parts--about the same number of discretes as the 542C reset circuit.
  • Timing of RESET delay, RESET duration, Power-on RESET duration, and switch debounce time are easy to set separately, without any complicated interactions.
  • The soft-shiftlock can be configured for ON or OFF at power up.
  • LED to indicate the Shiftlock status for both soft- and hard- shiftlock
  • Can switch between hard- and soft-shiftlock functions with a single jumper setting.
[EDIT 9/24/2022: There is a typo in the schematic. The reset delay is approximately (5.5 sec/uF) * the C2 value, not the C1 value.]
Reset_ShiftLock.png
Reset_ShiftLock.png (72.69 KiB) Viewed 5543 times
I've tested the circuit, but have not yet received the PCBs. This could also be constructed in the proto area of a 542 keyboard.

Cheers,

Dave

[Edited 5/25/20 to replace schematic with fixed version which includes additional diode D5 to prevent discharge of C5 into the 5V rail; and also change jumper to allow selecting default ON or OFF for the soft Shift Lock.]
dave
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Re: Soft Shiftlock and RESET delay circuit

Post by dave »

Here's how the reset circuit works:
  • At powerup, The RC circuit formed by R8 and C5 briefly keeps the input of U2A above the negative-going threshold, keeping the output of U2A low until C5 charges sufficiently via R8, at which point the output goes high. This provides a power-up /RESET pulse.
  • After powerup, with the BREAK switch open (not pressed), capacitor C2 is charged to 5V (via R3 and R4). The output of U2B is low, so that analog switch U1A is disabled (open). R8 pulls the input to U2A low, and the /RESET output is high. Also, the U2C output is high, charging C4 to 5V through R7.
  • On pressing BREAK, C2 slowly discharges through R4 (1M resistor), until the U2B shcmitt trigger threshold is met in about 3 seconds, and the U2B output switches high.
  • Once the BREAK delay has tripped (U2B output high), then:
    1. The switch U1A is activated, bringing the 5V on C4 to the input of U2A, causing the /RESET line to go low.
    2. The output of U2C goes low, and C4 discharges through R7 and R8 (in parallel) until the voltage on C4 falls below the schmitt trigger threshold of U2A, bringing the /RESET line high again. The C4*(R7||R8) time constant determines the duration of the /RESET pulse.
  • When the switch is released, C2 is quickly charged through R3 and D1, bypassing the 1M resistor R4, returning the input to U2B above threshold, and forcing the output low. This turns off the switch U1A, and R8 pulls the input to U2A low, keeping the /RESET output high (inactive.)
Edited 7/24/2020: Fixed some small typos.
dave
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Re: Soft Shiftlock and RESET delay circuit

Post by dave »

Here's how the shiftlock circuit works:
  • On powerup, the shiftlock switch is not depressed. C1 initially has no charge on it, and the input to U2F is low. The output of U10C is high, activating switch U1B, until the voltage of C1 crosses the Schmitt trigger high threshold.
  • C3 initially has no charge across it, and so the initial closure of switch U1B pulls the input of U2E low, and the output of U2E is therefore high. When the switch is deactivated, C3 is charged to 5V via R6. The input of U2E is held low by the output of U2D.
  • When the switch is pressed, C1 charges through R2, debouncing the switch, and the output of U2F goes high after the schmitt threshold is crossed. turns on switch U1B. C3 pulls the input of U2E high, and U2E forces the input of U2D low. C3 starts charging to the voltage determined by the divider formed by R5 and R6, which will be above the low trigger threshold, and so the circuit will remain stable with the output of U2E high.
  • When the switch is released, C1 is charged via R1 and R2, again providing debounce, and once the high schmitt threshold is crossed, the output of U2F goes low, turning off analog switch U1B.
  • When U1B is off, C3 discharges fully to 0V via R6.
  • On the next switch press, the process repeats, and the output of U2E toggles.
  • Switches U1C and U1D are driven either by the output of U2F (the debounced switch press), U2E, or U2D (the toggle circuit), selected by Jumper JP1
  • U1D takes place of the physical shift-lock switch in the keyboard switch array. When it is active (closed), the keyboard will read a shiftlock press.
  • Analog switch U1C turns on an LED when shiftlock is active.
Edited 7/24/20: Some small clarifications, and fixed some reference numbers.
musovern
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Re: Soft Shiftlock and RESET delay circuit

Post by musovern »

Hi Dave,

Great work as usual at explaining how the Shiftlock and RESET works.
Just download the latest revision of the Unified Retrocomputer Keyboard Project I do like the new build images and the new OSI Interface board ss it the OSO Rev 1.2 the latest and greatest. I will have to get a couple of those made myself can never have to many keyboards.

I have got my apple2-encoder Rev 4.0 PCB boards here now just waiting on some SMD parts to turn to finish.

cheers

Vernon
dave
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Re: Soft Shiftlock and RESET delay circuit

Post by dave »

Hi Vernon!

I have tested out the circuits on a breadboard, but have not yet build up the OSI interface board, so if you are feeling adventurous and build one up, you may end up doing some debugging :-) At the moment I still need to repair a C2/4/8 system to the point where I can test a keyboard :-)

Cheers,

Dave
dave
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Re: Soft Shiftlock and RESET delay circuit

Post by dave »

musovern wrote: Fri Jul 24, 2020 11:26 am I have got my apple2-encoder Rev 4.0 PCB boards here now just waiting on some SMD parts to turn to finish.
Nice! I have build up 3 of those and they work just fine.
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