Philip, I have taken the liberty of re-arranging the schematics to be a little more clear. However, thanks for taking the initiative to get this going; this has been on my to-do list for a while. The schematics are distributed over three sheets to decompress them a bit. The file is here. A few notes:
- I didn't include the MOTOR ON switch; I don't see a need for it. It would be easy to put a jumper back, though.
- Three of the 7486 XOR gates were just being used as inverters, and the fourth was being used essentially as an OR of the /HEAD LOAD and /STEP lines. A NAND in the same configuration will do the same thing, so I substituted a 74LS00. I also substituted a 74LS00 for one of the 7438's (used in the data separator, and gating the /INDEX pulses), since these are just driving local TTL, and don't need to be buffers. These two substitutions provide more flexibility for gate and part swapping to simplify the board routing.
- I added a second floppy connector
Dave